The TPS53659 is a fully VR13 SVID compliant step-down controller with dual channels, built-in non-volatile memory (NVM), and PMBus interface, and is fully compatible with TI NexFET power stage. Advanced control features such as D-CAP+ architecture with undershoot reduction (USR) provide fast transient response, low output capacitance, and good current sharing. The device also provides novel phase interleaving strategy and dynamic phase shedding for efficiency improvement at different loads. Adjustable control of VCORE slew rate and voltage positioning round out the Intel VR13 features. In addition, the device supports the PMBus communication interface for reporting the telemetry of voltage, current, power, temperature, and fault conditions to the systems. All programmable parameters can be configured by the PMBus interface and can be stored in NVM as the new default values to minimize the external component count.